TPUv4

source: TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings

Overview

• TPU v4 is designed to handle the evolving scale and complexity of machine learning models.
• Uses Optical Circuit Switches (OCSes) for dynamic reconfiguration of interconnect topology, improving various aspects such as scale, availability, utilization, and performance.
• Includes SparseCores to accelerate models relying on embeddings, achieving 5x–7x speed improvements while using only 5% of the die area and power.

Key Features

1. Optical Circuit Switches (OCSes)
2. SparseCore (SC)